New Member and New Oric Atmos Owner

If you want to ask questions about how the machine works, peculiar details, the differences between models, here it is !
How to program the oric hardware (VIA, FDC, ...) is also welcome.
SpaceFlightOrange
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Re: New Member and New Oric Atmos Owner

Post by SpaceFlightOrange »

mikeb wrote:
Wed Nov 20, 2019 6:46 pm
First: Apologies, I meant pin 4 and 15 of the DRAM (RAS, CAS) not pin 3 (Write Enable)
This is the CAS signal (can't remember but I think its IC12):
CAS.jpg
CAS.jpg (146 KiB) Viewed 4629 times
And this is IC18:
CAS-IC18.jpg
CAS-IC18.jpg (157.56 KiB) Viewed 4629 times
mikeb wrote:
Wed Nov 20, 2019 6:46 pm
You must've found ground :) The case of the modulator is a big shiny ground. Just be aware that the PSU you are using to drive Oric must be (like the original wall wart) isolated from mains earth, otherwise applying the (no doubt earthed!) probe of the scope to the board will bypass the regulator. This is not a problem for old style transformer wallwarts, or most modern switch mode replacements, but is a potential problem if you are using a bench supply or other metal cased PSU, often ground of supply is mains earthed. That doesn't work with Oric when you start introducing other earths!
:D Yeah, im using the Modulator. Apologies for such a stupid question as thats the goto point on the Spectrum (or the heatsink) but the weirdness around how the regulator is used worried me a little. In the end I just went for it!! Im currently using a brand new 9v 1a PSU which I bought specifically for thisthat is mains earth isolated. I do plan on switching to my bench PSU which I can and have setup to be mains earth isolated but I don't have a suitable lead and I haven't found a PSU that im willing to sacrifice to get one yet :lol:
mikeb wrote:
Wed Nov 20, 2019 6:46 pm
Address line, always high .... that's interesting. Assuming the ROM gave up a startup vector, code would be running in ROM area (#C000-FFFF) which means you can forgive A15,14 being high. A13 downwards should be moving about (high and low). Otherwise, if they are all high, all the time, that's #FFFF .... can you make sure all 16 are not stuck high?

What is pin 7 (SYNC) of the CPU (6502) doing? IF the 6502 is fetching/decoding/executing, this pin will be toggling high/low. You may need to watch it at power up, if you can, to see what it does (because it might be that the CPU is crashing very early on, see my comment about all-reading-no-writing).
I didn't check all the lines again tonight (getting very late) but when I did last night, they were all pretty much the same, though some where a little flatter than others, but all up at the same level. I'll check them again tomorrow

I tried to capture the output on startup but couldn't get the scope to trigger for some reason. But this is what I normally see:
CPU Pin 7.jpg
CPU Pin 7.jpg (117.84 KiB) Viewed 4629 times
To be continued...

SpaceFlightOrange
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Re: New Member and New Oric Atmos Owner

Post by SpaceFlightOrange »

mikeb wrote:
Wed Nov 20, 2019 6:49 pm
Adding: Just realised, the only SOURCE on the address bus is the CPU. So If you really do have #FFFF (all address high) then the CPU is either crashed (given up asserting addresses) or never bothered starting. The bus floats high when idle.

Tip: Pin 40 of the CPU -- once you've powered up, dab (briefly) a wire from this pin to ground (pin 1 or 21 of cpu) to FORCE a reset, in case the power on reset isn't happening, as that wouldn't let the CPU start. Let me know if that makes a difference.

You can also do that to restart the CPU while watching pin 7 to see of there is a burst of "SYNC SYNC SYNC ... crash ...." :)
This is what I get when I force a reset:
pic_34_5.jpg
pic_34_5.jpg (121.02 KiB) Viewed 4629 times
On startup I saw more pulses than this, but strangely after a couple of power-cycles I stopped seeing it.

When connected to the screen the reset didn't have any affect.

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Re: New Member and New Oric Atmos Owner

Post by SpaceFlightOrange »

iss wrote:
Wed Nov 20, 2019 11:55 pm
Yes, ULA sets the address lines but ONLY for RAM and only during the low level of F2.

@SpaceFlightOrange: It will sound like joke but ... do you have inserted the ROM chip(s)? :)

If you have ROM programmer you can try mikeb's Diag ROM: http://oric.signal11.org.uk/html/diagrom.htm

Attached is my very simple diagnostic ROM which doesn't use RAM at all - if CPU, VIA, AY and speaker are OK you will hear like a "phone busy" sound. (Works in emulators too ;)).
:lol: no such thing as a stupid question. The ROM is inserted. Now, I have just received a replacement 1.1 ROM from Spain. I was a little unhappy about the way it was packaged; stamped into a block of pink foam and just wrapped in Bubblewrap, so I hope its ok. I also have a replacement ULA, but I've been reluctant to try them in the machine in case they get damaged.

Unfortunately I don't have a programmer. though I am considering getting one. what chips should I get for burning? would 27C128's do?
Last edited by SpaceFlightOrange on Thu Nov 21, 2019 1:51 am, edited 1 time in total.

SpaceFlightOrange
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Re: New Member and New Oric Atmos Owner

Post by SpaceFlightOrange »

By The way,

I wanted to say thanks to everyone for all the help so far. It's been brilliant and I feel like im learning loads.

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mikeb
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Re: New Member and New Oric Atmos Owner

Post by mikeb »

iss wrote:
Wed Nov 20, 2019 11:55 pm
Chema wrote:
Wed Nov 20, 2019 11:09 pm
About the address bus, doesn't the ULA also read the ram to get image data, thus changing the address bus lines?
Yes, ULA sets the address lines ...
To be clear: NO it doesn't, not in the context I'm talking about. The system address bus, A0-15, is ONLY driven by the CPU. The ULA does NOT put anything onto this address bus.

The ULA does multiplex the two halves of the system address bus (A0-15) into the 8 row and column addresses for the DRAM chips, that is where the ULA gets to access DRAM, these addresses are invisible to the system address bus (they only exist between ULA and DRAM).

The fact that SYNC pulses makes it look like the CPU did try and fetch something. It wouldn't take long for it to crash if the data coming back was in some way wrong :)

27C128 is a 16K chip, so that's the size you want. It will work *but* is not compatible with certain external hardware (it can't be disabled like the real mask ROM, so ~ROMDIS line won't work!) -- for a lone Oric, no peripherals, it will be ok for testing.

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Re: New Member and New Oric Atmos Owner

Post by SpaceFlightOrange »

mikeb wrote:
Thu Nov 21, 2019 5:44 pm
To be clear: NO it doesn't, not in the context I'm talking about. The system address bus, A0-15, is ONLY driven by the CPU. The ULA does NOT put anything onto this address bus.

The ULA does multiplex the two halves of the system address bus (A0-15) into the 8 row and column addresses for the DRAM chips, that is where the ULA gets to access DRAM, these addresses are invisible to the system address bus (they only exist between ULA and DRAM).

The fact that SYNC pulses makes it look like the CPU did try and fetch something. It wouldn't take long for it to crash if the data coming back was in some way wrong :)

27C128 is a 16K chip, so that's the size you want. It will work *but* is not compatible with certain external hardware (it can't be disabled like the real mask ROM, so ~ROMDIS line won't work!) -- for a lone Oric, no peripherals, it will be ok for testing.
Do you think it would be safe to try the other ROM I have just received?

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Re: New Member and New Oric Atmos Owner

Post by SpaceFlightOrange »

I've tried the new ROM and new ULA

I tried all combinations:

New ROM, old ULA
old ROM, new ULA
new ROM, new ULA

No difference at all

I have some replacement multiplexers and a new inverter for IC's 8, 20, 21

is worth replacing them?

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iss
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Re: New Member and New Oric Atmos Owner

Post by iss »

After I reread the whole thread, IMHO and in the context of the shorting the input/output of the regulator - everything can be broken, so it's worth to change IC8 and IC20. IC21 can be verified easily with the oscilloscope - on all signal pins you should see pulses. Unfortunately after these IC's only CPU, VIA and AY remain as suspects...
But you have good tools and perfect (de)soldering skills - it would be a piece of cake to change them :).

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Re: New Member and New Oric Atmos Owner

Post by Chema »

mikeb wrote:
Thu Nov 21, 2019 5:44 pm
To be clear: NO it doesn't, not in the context I'm talking about. The system address bus, A0-15, is ONLY driven by the CPU. The ULA does NOT put anything onto this address bus.

The ULA does multiplex the two halves of the system address bus (A0-15) into the 8 row and column addresses for the DRAM chips, that is where the ULA gets to access DRAM, these addresses are invisible to the system address bus (they only exist between ULA and DRAM).
Ah, ok. I think I understood. Sorry I am a bit slow on this... I am quite a noob at electronics, but always curious :)

I was always thinking about checking the signals at the RAM chips, just in case any of these looks suspicious (always high or always low). This is what I understand people do when repairing old computers. Just like this one, where Noel finds a dead vram chip this way:


As there is image, albeit with wrong character data, I always suspected about the RAM or its related circuitry.

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Re: New Member and New Oric Atmos Owner

Post by SpaceFlightOrange »

Hi.

I've removed the 2 multiplexers and the inverter and socketed them. 3 new chips in.
IMG_0238.jpg
IMG_0238.jpg (3.54 MiB) Viewed 4535 times
I now get this:
IMG_0234.JPEG
IMG_0234.JPEG (1.24 MiB) Viewed 4535 times
Swapped the ROM and its pretty much the same but with a bit of colour:
IMG_0241.JPEG
IMG_0241.JPEG (2.12 MiB) Viewed 4535 times
There's definitely a pattern there. I feel like im getting close.

I haven't tried the other ULA yet.

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mikeb
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Re: New Member and New Oric Atmos Owner

Post by mikeb »

You're right, there is definitely a (good) pattern there. The cyan-red bars are about where I would expect the "white" bars in a black screen. If you count carefully, the pattern repeats 6 lines down and 16 characters across, which is 256 bytes later (6*40+16), which is normal.

I just checked the ATMOS Adv. User guide to see how far you could get from RESET with duff RAM. By my eye, you should get into the "Restart whole computer" routine at #F88F (called from the power on reset vector). It does some stuff that appears to need RAM, e.g. setting the stack pointer, setting up some page 2 vectors/jumps, but I guess we can lose them. Then it JSR's to the "Test and find quantity of RAM" routine.

That's bad. If there's duff RAM, it will never come back from that (JSR will stack a return address, and that won't work on RTS).

So the RAM test may well not work too well with failed RAM (as it also uses RAM locations to index through RAM), and I can't see what it would do in the event of "I wrote #AA, it read back wrong" -- the routine seems to have no mechanism for "and so I'm going to sulk!" -- it just exists and carries on.

Hmmm. "Test" RAM is probably a bit of a strong description :)

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Re: New Member and New Oric Atmos Owner

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So you think it’s still a ram issue? Does the pattern suggest the CPU might be functioning?

The ram I’ve gotten was admittedly cheap stuff from China, but I’ve bought some more from hopefully a better source, a little more expensive so fingers crossed.

None of the chips are getting hot. And the signals looked ok, so I don’t know.

I’ve got an eprom programmer coming. What eeprom’s can I use for the diagnostics Rom? I don’t have a UV eraser.

Thanks.

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Re: New Member and New Oric Atmos Owner

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SpaceFlightOrange wrote:
Mon Nov 25, 2019 8:31 pm
So you think it’s still a ram issue? Does the pattern suggest the CPU might be functioning?
TL;DR -- if you ripped out the CPU, VIA, PSG and ROM you'd still get a pattern :)

The problem is that the pattern comes from the DRAM's imagination, it wasn't put there by anything, so it only shows that the data can get out of the DRAM into the ULA, mostly intact.

The cells in a DRAM chip naturally all empty of charge when there's no power. You'd think that would be a sea of 0's or 1's, depending on how things are stored. (Like an EPROM - empty cell = 1 reported). However, DRAM manufacturers make life interesting by storing some bits/rows/cols as straight logic, and some as inverse. This is all internal and matters not one bit to the end user. It does mean, that at power up, there's a "pattern" related to this internal design.

The CPU appears to have started doing something, as you saw activity on the SYNC pin, which stopped. Force-resetting the CPU makes it do this again and die. Changing the ULA and ROM does not seem to have improved things. All of the logic chips in the upper and right area of the schematic, starting from the RGB lines of the ULA and sweeping across to the modulator are just about making the UHF picture. You've changed the important multiplexer/inverter near the RAM, and the RAM itself. There's not much left to swap, other than the CPU, VIA and PSG, which are all soldered in :(
SpaceFlightOrange wrote:
Mon Nov 25, 2019 8:31 pm
The ram I’ve gotten was admittedly cheap stuff from China, but I’ve bought some more from hopefully a better source, a little more expensive so fingers crossed.

None of the chips are getting hot. And the signals looked ok, so I don’t know.

I’ve got an eprom programmer coming. What eeprom’s can I use for the diagnostics Rom? I don’t have a UV eraser.
I use UV-EPROMs for straight plug-in to Oric compatibility needs to be a 27128/27C128 size (16K) -- you can use a 256 or 512, but it's getting into "modding the board" territory rather than repairs (you end up with 2 or 4 possible ROMs in one chip that way, e.g. Oric-1/Atmos/Extended other version/Diagnostics ...

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Re: New Member and New Oric Atmos Owner

Post by Vyper68 »

I have a 16KB EPROM burned with the test ROM if you want to borrow it. Haven’t read all of the thread so just to say have you changed the 12Mhz Crystal?
Bazinga!

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iss
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Re: New Member and New Oric Atmos Owner

Post by iss »

Here my diagnostic ROM running on Oric without RAM.
The "busy tone" is bit tiny because no LM386 amplifier - the signal is directly from AY's output pins (not very good idea! :mrgreen: ).


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