Many of you have probably been wondering where things have got to with this investigation. Some of you may have been keeping an eye on Mike Brown's ULA die shot page and would already have noticed many more diagrams and documents appearing on that page over the past few weeks:
Mike Brown has very much taken the lead with this effort. I was in almost daily communication with him for the first three weeks after we received the die shot images back, but I contributed less than 1% to the effort due to not having a lot of time. Luckily for all of us though, Mike Brown has had a lot of free time over the past 6 weeks. I myself have been away overseas on holiday for the past three, and during that time Mike has made significant progress, up to the point where today he has said he is done.
So what does done mean you might ask?
Something I hadn't mentioned up until this point is that Datel also provided me with some verilog files that went some way towards representing what was on the die shot. It contained almost all of the transistors and connections between them, and also many of the logic gates that had been identified through some kind of automated process. I wasn't sure to what degree the second file was complete, in fact Mike at Datel had indicated that they weren't complete. I passed these verilog files over to Mike Brown and he immediately saw these as the best way to derive the full logic of the die shot. So he started writing scripts to analyse and verify the verilog files provided by Datel. He started by writing scripts that took the transistor level verilog and attempted to identify the basic logic gates from those transistors and their connections. We thought that the transistor level file was probably mostly complete. Mike Brown did find a number of missing connections as part of his investigation though and as he went along he kept updating his version of the verilog to include everything he had identified as missing. He reached a point where his scripts were able to verify the logic gates contained in the second of the verilog files provided by Datel, but he very much took things beyond that, up to a point where his scripts identified all of the logic gates and all unused transistors. He then took it to the next level above that, identifying things such as flip flops (of which there were many). And then he started looking at the level above that, identifying counters, sets of data latches, registers, adders, clock dividers, etc.
I had mentioned to Mike that I'd used a tool called Logisim in the past to simulate purely digital circuits like this. I'd said that I might try to write something to convert his verilog files into a Logisim circuit, and then I went on holiday. Now that I'm back, I've discovered that Mike has already done it. He took the full Oric ULA circuit that he'd worked out from analysing the verilog and set about creating the circuit in Logisim and he reached a point with the simulation where it is fully working as expected. This is a great validation and verification of the circuits that he has produced from the die shot. You'll find those Logisim files also on his website.
Mike has documented this journey of discovery in a document that he has released on his website today:
http://oric.signal11.org.uk/files/pub/u ... Schems.pdf
I think you'll all find it a great read and we encourage you to have a read through and report back here with any feedback that you have. I'm sure you'll all be interested in the hidden feature that was discovered.